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Technical Reports
Papers 2008
Papers 2007
Papers 2006
Papers 2005
Papers 2004
Older Publications
Technical Reports
- Agarwal, A., Iskander, C., Kovalski, F., Shankar, R., A Concurrent Architectural Model for Communication Sub-System, CSI Technical Reports, TR 6-2006.
- Kalva, H., Krieghoff, C., Perret, J., Shankar, R., High Level Metrics for Power Dissipation and Signal Interference: An Integrated Methodology, CSI Technical Reports, TR 3-2005.
- Shankar, R., Masory, O., Krishnalyer, R., Gilmore, H., Mucciacciaro, D., Devenney, S., Ueltzen, R., K-12 Hands-on Science Education: A Small Business Proposal, CSI Technical Reports, TR 5-2000.
- Brown, H., Hadjilogiou, J., Landis, D., Sanders, T., Shahsavari, M., Shankar, R., A Rapid Prototype Wafer Scale System Design for Signal and Data Processing, CSI Technical Reports, TR 1-1989.
Papers 2008
- Cardei, I., Fonoage, M., Shankar, R., Model Based Requirements Specification and Validation for Component Architectures, 2nd Annual IEEE Systems Conference, Montreal, Canada, April 2008
- Agarwal, A., Iskander, C., Hamza-Lup, G., Shankar, R., System-Level Modeling Environment : MLDesigner, 2nd Annual IEEE Systems Conference, Montreal, Canada, April 2008
- Agarwal, A., Iskander, C., Kalva, H., Shankar, R., System-Level Modeling of a NOC Based H.264 Decoder, 2nd Annual IEEE Systems Conference, Montreal, Canada, April 2008
- Agarwal, A., Iskander, C., Islam, S., Katan, A., Shankar, R., Concurrency Compliant Embedded System Modeling Methodology, 2nd Annual IEEE Systems Conference, Montreal, Canada, April 2008
- Agarwal, A., Iskander, C., Hamza-Lup, G., Shankar, R., Component Selection Strategies Based on System Requirements & Dependencies on Components Attributes, 2nd Annual IEEE Systems Conference, Montreal, Canada, April 2008
Papers 2007
- Agarwal, A., Jain, A., Kalva, H., Shankar, R., Annotation Methods and Application Abstractions, IEEE International Conference on Portable Information Device, Orlando, Florida, April 2007, pp.1-5
- Cardei, I., Fonoage, M., Shankar, R., Framework for Requirements-Driven System Design Automation, the 1st IEEE Systems Conference, Honolulu, Hawaii, April 2007 Presentation
- Agarwal, A., Shankar, R., A Concurrency Model for Network on Chip Design Methodology International Journal of Modeling and Simulation (Acepted - to be published).
- Agarwal, A., Mustafa, M., Shankar, R., Pandya, A.S., Lho, Y., A Deadlock Free Router Design for Network on Chip Architecture, Journal of the Korea Institute of Maritine Information adn Communication Sciences, Vol. 11, No. 4, pp. 696-706, April 2007
- Agarwal, A., Shankar, S., Iskander, C., NoC Model in System Level Modeling Environment: MLDesigner, Journal of Engineering, Computing and Architectures" (Acepted - to be published).
- Agarwal, A., Iskander, C., Shankar, R., Survey of NoC Architectures and Contributions, Journal of Engineering, Computing and Architectures" (Acepted - to be published).
- Shankar, R., Kalva, H., Agarwal, A., Jain, A., Annotation Methods for Embedded Systems, IEEE International Conference on Portable Information Device, Orlando, FL April 2007.
- Agarwal, A., Hamza-Lup, G., Shankar, R., Ansley, J., An Integrated Methodology for QoS Driven Reusable Component Design and Component Selection, 1st Annual IEEE Systems Conference, Hawaii, April 2007, pp. 1-7 Presentation
- Choi, J., Islam, S., Shankar, R., Unified Test Environment-Integrated Platform For Bridging The Modeling, Testing, and Code Development Flow, 1st Annual IEEE Systems Conference, Hawaii, April 2007 Presentation
- Huang, S., Shankar, R., Mangs, J., Towards Strategic Design Reuse by Leveraging Commodity and managing Variability, 1st Annual IEEE Systems Conference, Hawaii, April 2007.
Papers 2006
- Agarwal, A., Shankar, R., Modeling Concurrency in NOC for Embedded Systems, IEEE Conference of High Performance Computing, Massachusetts Institute of Technology, MIT Lincoln Labs, Boston , Massachusetts, Septempber 2006.
- Agarwal, A., Shankar, R., Pandya, A.S., Embedding Intelligence into EDA Tools to Meet the Future Technology Trends, Integrated Intelligent Systems for Engineering Design, Edited by Dr. Xuan F Zha, National Institute of Standards and Technology, USA & Dr. R. J. Howlett, University of Bringhton, UK
- Agarwal, A., Shankar, R., A Concurrency Model for NOC Design Methodology, IEEE Conference of High Performance Computing, Massachusetts Institute of Technology, September 2006
- Agarwal, A., Pandya, A. S., Lho, Y., NOC Architecture Design Methodology, Journal of Korea Institute of matitime Information and Communication Sciences, Vol.1, pp. 57-64, August 2006
- Agarwal, A., Pandya, A.S., Lho, Y., Low Power High Frequency Data Transfer for a RISC and CISC Processor Using AdHoc Techniques, The International Journal of Korean Institute of Maritime Information and Communication Sciences, Vol. 10, No.2, pp. 321-327, August 2006.
- Agarwal, A., Pandya, A.,Software Complexity Management for Real-Time Systems, International Journal of KIMICS, Vol 4, No. 1, pp.23-27, March 2006
- Agarwal, A., Shankar, R., Kovalski, F., Modeling Concurrency on NOC Architecture with Symbolic Language: FSP, IEEE International Conference on Symbolic Methods and Applications to Circuit Design, October 2006
- Agarwal, A., Mustafa, M., Shankar, R., Quality of Service Driven Communication Backbone Design for Network on Chip Architecture Design Methodology, IEEE Conference in Electrical and Computer Engineering, Canada, May 2006
- Agarwal, A., Mustafa, M., Shankar, R., Pandya, A. S., Quality of Service Driven Communication Backbone Design for Network-on-Chip Architecture Design Methodology, IEEE Conference on Electrical and Computer Engineering, Canada, May 2006
Papers 2005
- Agarwal, A., Shankar, R., A Layered Architecture for NOC Design Methodology, International Conference on parallel and Distributed Computing and Systems", November 2005
- Shankar, R., and Barrett, Jr., R.L., On Building a Long-Term University-Industry Collaboration, accepted, IEMC (IEEE Engineering Management Conference) 2005, Newfoundland, Canada , August 2005.
- Agarwal, A., Pandya. A., Lho, Y., Low Power Design of an ALU Using AdHoc Techniques, International Journal of Fuzzy Logic and Intelligent Systems, Vol. 5, No. 2, Jun 2005
- Agarwal, A., Pandya. A., Lho, Y.,Biometrics for Person Authentication: A Survey, Journal of Korea Intelligent Information System Society, Vol. 11, No. 1, pp. 1-15, June 2005
Papers 2004
- Asaduzzaman, A., Mahgoub, I. , Kalva, H., Sanginepalli, Shankar, R., and Furht, B.,Cache Optimization for Mobile Devices Running Multimedia Applications, IEEE, 6 th ISMSE, Miami , FL December 2004, pp. 499-506.
- Shankar, R., and Jayadevappa, S., A New SystemC-based Foundation for the CE Curriculum, European Workshop on Microelectronics Education (EWME), Oral Presentation, Lausanne, Switzerland, April 2004, pp. 33-37. Presentation
- Jayadevappa, S., Shankar, R., and Mahgoub, I. , A Comparative Study of Modeling at Different Levels of Abstraction in System on Chip Designs: A Case Study, IEEE Symposium on VLSI (ISVLSI), Lafayette , LA , February 2004
- Agarwal, A., Pandya. A., Lho, Y., Low Power Design of a Neuroprocessor, International Journal of Fuzzy Logic and Intelligent Systems, Vol. 4, No. 1, pp. 79-81, Jun 2004
- Jillellamudi, H., Wissinger, F., Goswami, J., Shankar, R., Transaction Level Modeling of a Peripheral Using SystemC, Unpublished, 2004
Older Publications
- Quraishi, G., Shankar R., On Simulating the IP Market Dynamics in an Academic Environment using SystemC, 2003 IEEE International Conference On Microelectronic Systems Education, MSE 2003, Anaheim, CA, USA, June 1-2, 2003
- Ajmera, A.M., Shankar R., Masory, O., AMS Designer for Mechatronics, 2002 IEEE International Workshop on Behavioral Modeling and Simulation, BMAS 2002, Santa Rosa, CA, Oct. 6-8, 2002
- Ajmera, A. M., Shankar, R., Masory, O., AMS Designer for Mechatronics, International Cadence Usergroup Conference 2002, Cadence Design Systems, San Jose, CA, Sep 15-19, 2002
- Pajunen, G., Steinmetz, M., and Shankar, R., Model Reference Adaptive Control with Constraints for Postoperative Blood Pressure Management, IEEE Trans. Biomed. Eng., Vol. 37, No. 7, pp. 679-687, July 1990.
- Shankar, T.M.R., Webster, J.G. and Shao, S.Y., The Contribution of Vessel Volume Change and Blood Resistivity Change to the Electrical Impedance Pulse, IEEE Trans. Biomed. Eng, Vol. BME-32, No. 3, pp. 192-198, March 1985
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